Hardware and Software: Verification and Testing (Record no. 37308)
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| 000 -LEADER | |
|---|---|
| fixed length control field | 03162nam a22004815i 4500 |
| 020 ## - INTERNATIONAL STANDARD BOOK NUMBER | |
| ISBN | 9783540779667 |
| -- | 978-3-540-77966-7 |
| 082 04 - DEWEY DECIMAL CLASSIFICATION NUMBER | |
| Classification number | 005.1 |
| 245 10 - TITLE STATEMENT | |
| Title | Hardware and Software: Verification and Testing |
| Sub Title | Third International Haifa Verification Conference, HVC 2007, Haifa, Israel, October 23-25, 2007. Proceedings / |
| Statement of responsibility, etc | edited by Karen Yorav. |
| 260 #1 - PUBLICATION, DISTRIBUTION, ETC. (IMPRINT) | |
| Place of publication | Berlin, Heidelberg : |
| Name of publisher | Springer Berlin Heidelberg, |
| Year of publication | 2008. |
| 300 ## - PHYSICAL DESCRIPTION | |
| Number of Pages | XII, 267 p. |
| Other physical details | online resource. |
| 490 1# - SERIES STATEMENT | |
| Series statement | Lecture Notes in Computer Science, |
| 505 0# - FORMATTED CONTENTS NOTE | |
| Formatted contents note | Invited Talks -- Simulation vs. Formal: Absorb What Is Useful; Reject What Is Useless -- Scaling Commercial Verification to Larger Systems -- From Hardware Verification to Software Verification: Re-use and Re-learn -- Where Do Bugs Come from? -- HVC Award -- Symbolic Execution and Model Checking for Testing -- Hardware Verification -- On the Characterization of Until as a Fixed Point Under Clocked Semantics -- Reactivity in SystemC Transaction-Level Models -- Model Checking -- Verifying Parametrised Hardware Designs Via Counter Automata -- How Fast and Fat Is Your Probabilistic Model Checker? An Experimental Performance Comparison -- Dynamic Hardware Verification -- Constraint Patterns and Search Procedures for CP-Based Random Test Generation -- Using Virtual Coverage to Hit Hard-To-Reach Events -- Merging Formal and Testing -- Test Case Generation for Ultimately Periodic Paths -- Dynamic Testing Via Automata Learning -- Formal Verification for Software -- On the Architecture of System Verification Environments -- Exploiting Shared Structure in Software Verification Conditions -- Delayed Nondeterminism in Model Checking Embedded Systems Assembly Code -- A Complete Bounded Model Checking Algorithm for Pushdown Systems -- Software Testing -- Locating Regression Bugs -- The Advantages of Post-Link Code Coverage -- GenUTest: A Unit Test and Mock Aspect Generation Tool. |
| 650 #0 - SUBJECT ADDED ENTRY--TOPICAL TERM | |
| Topical Term | Computer science. |
| 650 #0 - SUBJECT ADDED ENTRY--TOPICAL TERM | |
| Topical Term | Software engineering. |
| 650 #0 - SUBJECT ADDED ENTRY--TOPICAL TERM | |
| Topical Term | Logic design. |
| 650 14 - SUBJECT ADDED ENTRY--TOPICAL TERM | |
| Topical Term | Computer Science. |
| 650 24 - SUBJECT ADDED ENTRY--TOPICAL TERM | |
| Topical Term | Software Engineering. |
| 650 24 - SUBJECT ADDED ENTRY--TOPICAL TERM | |
| Topical Term | Logics and Meanings of Programs. |
| 650 24 - SUBJECT ADDED ENTRY--TOPICAL TERM | |
| Topical Term | Programming Languages, Compilers, Interpreters. |
| 700 1# - ADDED ENTRY--PERSONAL NAME | |
| Personal name | Yorav, Karen. |
| 856 40 - ELECTRONIC LOCATION AND ACCESS | |
| Uniform Resource Identifier | http://dx.doi.org/10.1007/978-3-540-77966-7 |
| 942 ## - ADDED ENTRY ELEMENTS (KOHA) | |
| Koha item type | E-BOOKS |
| 264 #1 - | |
| -- | Berlin, Heidelberg : |
| -- | Springer Berlin Heidelberg, |
| -- | 2008. |
| 336 ## - | |
| -- | text |
| -- | txt |
| -- | rdacontent |
| 337 ## - | |
| -- | computer |
| -- | c |
| -- | rdamedia |
| 338 ## - | |
| -- | online resource |
| -- | cr |
| -- | rdacarrier |
| 347 ## - | |
| -- | text file |
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| -- | rda |
| 830 #0 - SERIES ADDED ENTRY--UNIFORM TITLE | |
| -- | 0302-9743 ; |
| Withdrawn status | Lost status | Damaged status | Not for loan | Current library | Accession Number | Uniform Resource Identifier | Koha item type |
|---|---|---|---|---|---|---|---|
| IMSc Library | EBK8014 | http://dx.doi.org/10.1007/978-3-540-77966-7 | E-BOOKS |