Formal Methods and Software Engineering [electronic resource] : 9th International Conference on Formal Engineering Methods, ICFEM 2007, Boca Raton, FL, USA, November 14-15, 2007. Proceedings / edited by Michael Butler, Michael G. Hinchey, María M. Larrondo-Petrie.
Material type: TextSeries: Lecture Notes in Computer Science ; 4789Publisher: Berlin, Heidelberg : Springer Berlin Heidelberg, 2007Description: online resourceContent type: text Media type: computer Carrier type: online resourceISBN: 9783540766506Subject(s): Computer science | Software engineering | Logic design | Computer Science | Programming Techniques | Software Engineering | Models and Principles | Logics and Meanings of Programs | Programming Languages, Compilers, InterpretersAdditional physical formats: Printed edition:: No titleDDC classification: 005.11 LOC classification: QA76.6-76.66Online resources: Click here to access onlineCurrent library | Home library | Call number | Materials specified | URL | Status | Date due | Barcode |
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IMSc Library | IMSc Library | Link to resource | Available | EBK7915 |
Invited Talks -- A System Development Process with Event-B and the Rodin Platform -- Challenges in Software Certification -- Security and Knowledge -- Integrating Formal Methods with System Management -- Formal Engineering of XACML Access Control Policies in VDM++ -- A Verification Framework for Agent Knowledge -- Embedded Systems -- From Model-Based Design to Formal Verification of Adaptive Embedded Systems -- Machine-Assisted Proof Support for Validation Beyond Simulink -- VeSTA: A Tool to Verify the Correct Integration of a Component in a Composite Timed System -- Testing -- Integrating Specification-Based Review and Testing for Detecting Errors in Programs -- Testing for Refinement in CSP -- Reducing Test Sequence Length Using Invertible Sequences -- Automated Analysis -- Model Checking with SAT-Based Characterization of ACTL Formulas -- Automating Refinement Checking in Probabilistic System Design -- Model Checking in Practice: Analysis of Generic Bootloader Using SPIN -- Model Checking Propositional Projection Temporal Logic Based on SPIN -- Hardware -- A Denotational Semantics for Handel-C Hardware Compilation -- Automatic Generation of Verified Concurrent Hardware -- Modeling and Verification of Master/Slave Clock Synchronization Using Hybrid Automata and Model-Checking -- Concurrency -- Efficient Symbolic Execution of Large Quantifications in a Process Algebra -- Formalizing SANE Virtual Processor in Thread Algebra -- Calculating and Composing Progress Properties in Terms of the Leads-to Relation -- Erratum -- Erratum to: Challenges in Software Certification.
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