Integrated Circuit and System Design. Power and Timing Modeling, Optimization, and Simulation [electronic resource] : 20th International Workshop, PATMOS 2010, Grenoble, France, September 7-10, 2010, Revised Selected Papers / edited by René Leuken, Gilles Sicard.

Contributor(s): Leuken, René [editor.] | Sicard, Gilles [editor.] | SpringerLink (Online service)Material type: TextTextSeries: Lecture Notes in Computer Science ; 6448Publisher: Berlin, Heidelberg : Springer Berlin Heidelberg, 2011Description: XII, 260p. online resourceContent type: text Media type: computer Carrier type: online resourceISBN: 9783642177521Subject(s): Computer science | Computer Communication Networks | Computer system performance | Software engineering | Computer software | Logic design | Computer simulation | Computer Science | System Performance and Evaluation | Simulation and Modeling | Computer Communication Networks | Software Engineering | Logics and Meanings of Programs | Algorithm Analysis and Problem ComplexityAdditional physical formats: Printed edition:: No titleDDC classification: 004.24 LOC classification: QA76.9.E94Online resources: Click here to access online In: Springer eBooksSummary: This book constitutes the refereed proceedings of the 20th International Conference on Integrated Circuit and System Design, PATMOS 2010, held in Grenoble, France, in September 2010. The 24 revised full papers presented and the 9 extended abstracts were carefully reviewed and are organized in topical sections on design flows; circuit techniques; low power circuits; self-timed circuits; process variation; high-level modeling of poweraware heterogeneous designs in SystemC-AMS; and minalogic.
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This book constitutes the refereed proceedings of the 20th International Conference on Integrated Circuit and System Design, PATMOS 2010, held in Grenoble, France, in September 2010. The 24 revised full papers presented and the 9 extended abstracts were carefully reviewed and are organized in topical sections on design flows; circuit techniques; low power circuits; self-timed circuits; process variation; high-level modeling of poweraware heterogeneous designs in SystemC-AMS; and minalogic.

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