Advances in Computer Science - ASIAN 2006. Secure Software and Related Issues [electronic resource] : 11th Asian Computing Science Conference, Tokyo, Japan, December 6-8, 2006, Revised Selected Papers / edited by Mitsu Okada, Ichiro Satoh.
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Current library | Home library | Call number | Materials specified | URL | Status | Date due | Barcode |
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IMSc Library | IMSc Library | Link to resource | Available | EBK7995 |
ASIAN’2006 -- Security Evaluation of a Type of Table-Network Implementation of Block Ciphers -- A Symbolic Intruder Model for Hash-Collision Attacks -- A Denotational Approach to Scope-Based Compensable Flow Language for Web Service -- Certificateless Authenticated Two-Party Key Agreement Protocols -- FORM : A Federated Rights Expression Model for Open DRM Frameworks -- A Method of Safety Analysis for Runtime Code Update -- Automata-Based Confidentiality Monitoring -- Efficient and Practical Control Flow Monitoring for Program Security -- Modular Formalization of Reactive Modules in COQ -- Closing Internal Timing Channels by Transformation -- Responsiveness in Process Calculi -- Normal Proofs in Intruder Theories -- Breaking and Fixing Public-Key Kerberos -- Computational Soundness of Formal Indistinguishability and Static Equivalence -- Secrecy Analysis in Protocol Composition Logic -- A Type-Theoretic Framework for Formal Reasoning with Different Logical Foundations -- On Completeness of Logical Relations for Monadic Types -- A Spatial Logical Characterisation of Context Bisimulation -- Information Hiding in the Join Calculus -- Modeling Urgency in Component-Based Real-Time Systems -- Maintaining Data Consistency of XML Databases Using Verification Techniques -- An Operational Semantics of Program Dependence Graphs for Unstructured Programs -- Combination of Abstractions in the ASTRÉE Static Analyzer -- Proving Noninterference by a Fully Complete Translation to the Simply Typed ?-Calculus -- Formalization of CTL* in Calculus of Inductive Constructions -- Inferring Disjunctive Postconditions -- An Approach to Formal Verification of Arithmetic Functions in Assembly.
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