Integrating path and timing analysis using instruction-level simulation techniques -- On predicting data cache behavior for real-time systems -- Automatic accurate time-bound analysis for high-level languages -- Extending RT-Linux to support flexible hard real-time systems with optional components -- Limited preemptible scheduling to embrace cache memory in real-time systems -- A uniform reliable multicast protocol with guaranteed response times -- A tool to assist in fine-tuning and debugging embedded real-time systems -- Debugging distributed implementations of modal process systems -- Using Inferno™ to execute Java™ on small devices -- TurboJ, a Java bytecode-to-native compiler -- Cache sensitive pre-runtime scheduling -- Priority assignment for embedded reactive real-time systems -- Mapping an embedded hard real-time systems SDL specification to an analyzable task network — A case study -- Efficient User-level I/O in the ARX real-time operating system -- Machine descriptions to build tools for embedded systems -- Non-local instruction scheduling with limited code growth -- An efficient data partitioning method for limited memory embedded systems -- A design environment for counterflow pipeline synthesis -- End-to-end optimization in heterogeneous distributed real-time systems -- Using UML for modeling complex real-time systems -- Evaluating ASIC, DSP, and RISC architectures for embedded applications.

This book constitutes the strictly refereed post-workshop proceedings of the ACM SIGPLAN Workshop on Languages, Compilers, and Tools for Embedded Systems, LCTES '98, held in Montreal, Canada, in June 1998. The 19 revised papers presented were carefully reviewed and selected from a total of 54 submissions for inclusion in the book; also included are one full paper and an abstract of an invited contribution. The papers address all current aspects of research and development in the rapidly growing area of embedded systems and real-time computing.