Exploitation of Fine-Grain Parallelism [electronic resource] / edited by Günter Böckle.
Material type: TextSeries: Lecture Notes in Computer Science ; 942Publisher: Berlin, Heidelberg : Springer Berlin Heidelberg, 1995Description: XI, 193 p. online resourceContent type: text Media type: computer Carrier type: online resourceISBN: 9783540494171Subject(s): Computer science | Microprogramming | Logic design | Computer Science | Programming Languages, Compilers, Interpreters | Control Structures and Microprogramming | Arithmetic and Logic Structures | Logic Design | Processor Architectures | Programming TechniquesAdditional physical formats: Printed edition:: No titleDDC classification: 005.13 LOC classification: QA76.7-76.73QA76.76.C65Online resources: Click here to access onlineCurrent library | Home library | Call number | Materials specified | URL | Status | Date due | Barcode |
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IMSc Library | IMSc Library | Link to resource | Available | EBK6767 |
Kinds of parallelism -- Architectures for fine-grain parallelism -- VLIW machines -- Constraints on VLIW architectures -- Architectural support for exploitation of fine-grain parallelism -- Constraints for instruction scheduling -- Instruction-scheduling methods -- Developing instruction-scheduling methods -- Tools for instruction scheduling -- The machine model -- The horizontal instruction-scheduler -- Resource management -- Exceptions -- Vertical instruction-scheduling -- Conclusion.
Many parallel computer architectures are especially suited for particular classes of applications. However, there are only a few parallel architectures equally well suited for standard programs. Much effort is invested into research in compiler techniques to make programming parallel machines easier. This book presents methods for automatic parallelization, so that programs need not to be tailored for specific architectures; here the focus is on fine-grain parallelism, offered by most new microprocessor architectures. The book addresses compiler writers, computer architects, and students by demonstrating the manifold complex relationships between architecture and compiler technology.
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