Keynotes -- Reconfigurable Platform for Digital Convergence Terminals -- European Research in Embedded Systems -- System Design and Modeling -- Interface Overheads in Embedded Multimedia Software -- A UML Profile for Asynchronous Hardware Design -- Automated Distribution of UML 2.0 Designed Applications to a Configurable Multiprocessor Platform -- Towards a Transformation Chain Modeling Language -- Key Research Challenges for Successfully Applying MDD Within Real-Time Embedded Software Development -- Domain-Specific Modeling of Power Aware Distributed Real-Time Embedded Systems -- Mining Dynamic Document Spaces with Massively Parallel Embedded Processors -- Efficient Automated Clock Gating Using CoDeL -- An Optimization Methodology for Memory Allocation and Task Scheduling in SoCs Via Linear Programming -- Wireless Sensor Networks -- Designing Wireless Sensor Nodes -- Design, Implementation, and Experiments on Outdoor Deployment of Wireless Sensor Network for Environmental Monitoring -- LATONA: An Advanced Server Architecture for Ubiquitous Sensor Network -- An Approach for the Reduction of Power Consumption in Sensor Nodes of Wireless Sensor Networks: Case Analysis of Mica2 -- Energy-Driven Partitioning of Signal Processing Algorithms in Sensor Networks -- Preamble Sense Multiple Access (PSMA) for Impulse Radio Ultra Wideband Sensor Networks -- Security in Wireless Sensor Networks: Considerations and Experiments -- On Security of PAN Wireless Systems -- Processor Design -- Code Size Reduction by Compiler Tuning -- Energy Optimization of a Multi-bank Main Memory -- Probabilistic Modelling and Evaluation of Soft Real-Time Embedded Systems -- Hybrid Functional and Instruction Level Power Modeling for Embedded Processors -- Low-Power, High-Performance TTA Processor for 1024-Point Fast Fourier Transform -- Software Pipelining Support for Transport Triggered Architecture Processors -- SAD Prefetching for MPEG4 Using Flux Caches -- Effects of Program Compression -- Integrated Instruction Scheduling and Fine-Grain Register Allocation for Embedded Processors -- Compilation and Simulation Tool Chain for Memory Aware Energy Optimizations -- A Scalable, Multi-thread, Multi-issue Array Processor Architecture for DSP Applications Based on Extended Tomasulo Scheme -- Reducing Execution Unit Leakage Power in Embedded Processors -- Memory Architecture Evaluation for Video Encoding on Enhanced Embedded Processors -- Advantages of Java Processors in Cache Performance and Power for Embedded Applications -- Dependable Computing -- CARROT – A Tool for Fast and Accurate Soft Error Rate Estimation -- A Scheduling Strategy for a Real-Time Dependable Organic Middleware -- Autonomous Construction Technology of Community for Achieving High Assurance Service -- Preventing Denial-of-Service Attacks in Shared CMP Caches -- Architectures and Implementations -- A Method for Router Table Compression for Application Specific Routing in Mesh Topology NoC Architectures -- Real-Time Embedded System for Rear-View Mirror Overtaking Car Monitoring -- Design of Asynchronous Embedded Processor with New Ternary Data Encoding Scheme -- Hardware-Based IP Lookup Using n-Way Set Associative Memory and LPM Comparator -- A Flash File System to Support Fast Mounting for NAND Flash Memory Based Embedded Systems -- Rescheduling for Optimized SHA-1 Calculation -- Software Implementation of WiMAX on the Sandbridge SandBlaster Platform -- High-Radix Addition and Multiplication in the Electron Counting Paradigm Using Single Electron Tunneling Technology -- Area, Delay, and Power Characteristics of Standard-Cell Implementations of the AES S-Box -- Embedded Sensor Systems -- Integrated Microsystems in Industrial Applications -- A Solid-State 2-D Wind Sensor -- Fault-Tolerant Bus System for Airbag Sensors and Actuators.