Computer Aided Verification (Record no. 35783)
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| fixed length control field | 04934nam a22005775i 4500 |
| 020 ## - INTERNATIONAL STANDARD BOOK NUMBER | |
| ISBN | 9783540484691 |
| -- | 978-3-540-48469-1 |
| 082 04 - DEWEY DECIMAL CLASSIFICATION NUMBER | |
| Classification number | 005.1015113 |
| 245 10 - TITLE STATEMENT | |
| Title | Computer Aided Verification |
| Sub Title | 6th International Conference, CAV '94 Stanford, California, USA, June 21–23, 1994 Proceedings / |
| Statement of responsibility, etc | edited by David L. Dill. |
| 260 #1 - PUBLICATION, DISTRIBUTION, ETC. (IMPRINT) | |
| Place of publication | Berlin, Heidelberg : |
| Name of publisher | Springer Berlin Heidelberg, |
| Year of publication | 1994. |
| 300 ## - PHYSICAL DESCRIPTION | |
| Number of Pages | X, 486 p. |
| Other physical details | online resource. |
| 490 1# - SERIES STATEMENT | |
| Series statement | Lecture Notes in Computer Science, |
| 505 0# - FORMATTED CONTENTS NOTE | |
| Formatted contents note | A determinizable class of timed automata -- Real-time system verification using P/T nets -- Criteria for the simple path property in timed automata -- Hierarchical representations of discrete functions, with application to model checking -- Symbolic verification with periodic sets -- Automatic verification of pipelined microprocessor control -- Using abstractions for the verification of linear hybrid systems -- Decidability of hybrid systems with rectangular differential inclusions -- Suspension automata: A decidable class of hybrid automata -- Verification of context-free timed systems using linear hybrid observers -- On the random walk method for protocol testing -- An automata-theoretic approach to branching-time model checking (Extended abstract) -- Realizability and synthesis of reactive modules -- Model checking of macro processes -- Methodology and system for practical formal verification of reactive hardware -- Modeling and verification of a real life protocol using symbolic model checking -- Verification of a distributed cache memory by using abstractions -- Beyond model checking -- Models whose checks don't explode -- On the automatic computation of network invariants -- Ground temporal logic: A logic for hardware verification -- A hybrid model for reasoning about composed hardware systems -- Composing symbolic trajectory evaluation results -- The completeness of a hardware inference system -- Efficient model checking by automated ordering of transition relation partitions -- The verification problem for safe replaceability -- Formula-dependent equivalence for compositional CTL model checking -- An improved algorithm for the evaluation of fixpoint expressions -- Incremental model checking in the modal mu-calculus -- Performance improvement of state space exploration by regular & differential hashing functions -- Combining partial order reductions with on-the-fly model-checking -- Improving language containment using fairness graphs -- A parallel algorithm for relational coarsest partition problems and its implementation -- Another look at LTL model checking -- The mobility workbench — A tool for the ?-Calculus -- Compositional semantics of Esterel and verification by compositional reductions -- Model checking using adaptive state and data abstraction -- Automatic verification of timed circuits. |
| 520 ## - SUMMARY, ETC. | |
| Summary, etc | This volume contains the proceedings of the 6th Conference on Computer Aided Verification, held at Stanford University in June 1994. The in total 37 included papers were selected in a highly competetive reviewing process from 121 submissions; in total they document many of the most important advances achieved in CAV research and applications since the predecessor conference held in June 1993. The volume is organized in sections on Real-Time Systems, CAV Theory, CAV Applications, Symbolic Verification, Hybrid Systems, Model Checking, Improving Efficiency, and Hardware Verification. |
| 650 #0 - SUBJECT ADDED ENTRY--TOPICAL TERM | |
| Topical Term | Computer science. |
| 650 #0 - SUBJECT ADDED ENTRY--TOPICAL TERM | |
| Topical Term | Computer Communication Networks. |
| 650 #0 - SUBJECT ADDED ENTRY--TOPICAL TERM | |
| Topical Term | Software engineering. |
| 650 #0 - SUBJECT ADDED ENTRY--TOPICAL TERM | |
| Topical Term | Logic design. |
| 650 #0 - SUBJECT ADDED ENTRY--TOPICAL TERM | |
| Topical Term | Electronics. |
| 650 14 - SUBJECT ADDED ENTRY--TOPICAL TERM | |
| Topical Term | Computer Science. |
| 650 24 - SUBJECT ADDED ENTRY--TOPICAL TERM | |
| Topical Term | Logics and Meanings of Programs. |
| 650 24 - SUBJECT ADDED ENTRY--TOPICAL TERM | |
| Topical Term | Software Engineering. |
| 650 24 - SUBJECT ADDED ENTRY--TOPICAL TERM | |
| Topical Term | Electronics and Microelectronics, Instrumentation. |
| 650 24 - SUBJECT ADDED ENTRY--TOPICAL TERM | |
| Topical Term | Computer Communication Networks. |
| 700 1# - ADDED ENTRY--PERSONAL NAME | |
| Personal name | Dill, David L. |
| 856 40 - ELECTRONIC LOCATION AND ACCESS | |
| Uniform Resource Identifier | http://dx.doi.org/10.1007/3-540-58179-0 |
| 942 ## - ADDED ENTRY ELEMENTS (KOHA) | |
| Koha item type | E-BOOKS |
| 264 #1 - | |
| -- | Berlin, Heidelberg : |
| -- | Springer Berlin Heidelberg, |
| -- | 1994. |
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| -- | text |
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| -- | computer |
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| -- | rdamedia |
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| -- | online resource |
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| -- | text file |
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| -- | rda |
| 830 #0 - SERIES ADDED ENTRY--UNIFORM TITLE | |
| -- | 0302-9743 ; |
| Withdrawn status | Lost status | Damaged status | Not for loan | Current library | Accession Number | Uniform Resource Identifier | Koha item type |
|---|---|---|---|---|---|---|---|
| IMSc Library | EBK6489 | http://dx.doi.org/10.1007/3-540-58179-0 | E-BOOKS |