| 000 -LEADER |
|---|
| fixed length control field |
05026nam a22006015i 4500 |
| 020 ## - INTERNATIONAL STANDARD BOOK NUMBER |
|---|
| ISBN |
9783540483465 |
| -- |
978-3-540-48346-5 |
| 082 04 - DEWEY DECIMAL CLASSIFICATION NUMBER |
|---|
| Classification number |
005.1015113 |
| 245 10 - TITLE STATEMENT |
|---|
| Title |
Higher Order Logic Theorem Proving and Its Applications |
| Sub Title |
6th International Workshop, HUG '93 Vancouver, B. C., Canada, August 11–13, 1993 Proceedings / |
| Statement of responsibility, etc |
edited by Jeffrey J. Joyce, Carl-Johan H. Seger. |
| 260 #1 - PUBLICATION, DISTRIBUTION, ETC. (IMPRINT) |
|---|
| Place of publication |
Berlin, Heidelberg : |
| Name of publisher |
Springer Berlin Heidelberg, |
| Year of publication |
1994. |
| 300 ## - PHYSICAL DESCRIPTION |
|---|
| Number of Pages |
X, 526 p. |
| Other physical details |
online resource. |
| 490 1# - SERIES STATEMENT |
|---|
| Series statement |
Lecture Notes in Computer Science, |
| 505 0# - FORMATTED CONTENTS NOTE |
|---|
| Formatted contents note |
Program verification using HOL-UNITY -- Graph model of LAMBDA in higher order logic -- Mechanizing a programming logic for the concurrent programming language microSR in HOL -- Reasoning with the formal definition of standard ML in HOL -- HOL-ML -- Structure and behaviour in hardware verification -- Degrees of formality in shallow embedding hardware description languages in HOL -- A functional approach for formalizing regular hardware structures -- A proof development system for the HOL theorem prover -- A HOL package for reasoning about relations defined by mutual induction -- A broader class of trees for recursive type definitions for HOL -- Some theorems we should prove -- Using PVS to prove some theorems of David Parnas -- Extending the HOL theorem prover with a computer algebra system to reason about the reals -- The HOL-Voss system: Model-checking inside a general-purpose theorem-prover -- Linking Higher Order Logic to a VLSI CAD system -- Alternative proof procedures for finite-state machines in higher-order logic -- A formalization of abstraction in LAMBDA -- Report on the UCD microcoded Viper verification project -- Verification of the Tamarack-3 microprocessor in a hybrid verification environment -- Abstraction techniques for modeling real-world interface chips -- Implementing a methodology for formally verifying RISC processors in HOL -- Domain theory in HOL -- Predicates, temporal logic, and simulations -- Formalization of variables access constraints to support compositionality of liveness properties -- The semantics of statecharts in HOL -- Value-passing CCS in HOL -- TPS: An interactive and automatic tool for proving theorems of type theory -- Modelling bit vectors in HOL: The word library -- Eliminating higher-order quantifiers to obtain decision procedures for hardware verification -- Toward a super duper hardware tactic -- A mechanisation of name-carrying syntax up to alpha-conversion -- A HOL decision procedure for elementary real algebra -- AC unification in HOL90 -- Server-process restrictiveness in HOL -- Safety in railway signalling data: A behavioural analysis -- On the style of mechanical proving -- From abstract data types to shift registers: -- Verification in higher order logic of mutual exclusion algorithm -- Using Isabelle to prove simple theorems. |
| 520 ## - SUMMARY, ETC. |
|---|
| Summary, etc |
This volume constitutes the refereed proceedings of the 1993 Higher-Order Logic User's Group Workshop, held at the University of British Columbia in August 1993. The workshop was sponsored by the Centre for Integrated Computer System Research. It was the sixth in the series of annual international workshops dedicated to the topic of Higher-Order Logic theorem proving, its usage in the HOL system, and its applications. The volume contains 40 papers, including an invited paper by David Parnas, McMaster University, Canada, entitled "Some theorems we should prove". |
| 650 #0 - SUBJECT ADDED ENTRY--TOPICAL TERM |
|---|
| Topical Term |
Computer science. |
| 650 #0 - SUBJECT ADDED ENTRY--TOPICAL TERM |
|---|
| Topical Term |
Logic design. |
| 650 #0 - SUBJECT ADDED ENTRY--TOPICAL TERM |
|---|
| Topical Term |
Software engineering. |
| 650 #0 - SUBJECT ADDED ENTRY--TOPICAL TERM |
|---|
| Topical Term |
Artificial intelligence. |
| 650 14 - SUBJECT ADDED ENTRY--TOPICAL TERM |
|---|
| Topical Term |
Computer Science. |
| 650 24 - SUBJECT ADDED ENTRY--TOPICAL TERM |
|---|
| Topical Term |
Logics and Meanings of Programs. |
| 650 24 - SUBJECT ADDED ENTRY--TOPICAL TERM |
|---|
| Topical Term |
Mathematical Logic and Formal Languages. |
| 650 24 - SUBJECT ADDED ENTRY--TOPICAL TERM |
|---|
| Topical Term |
Artificial Intelligence (incl. Robotics). |
| 650 24 - SUBJECT ADDED ENTRY--TOPICAL TERM |
|---|
| Topical Term |
Software Engineering. |
| 650 24 - SUBJECT ADDED ENTRY--TOPICAL TERM |
|---|
| Topical Term |
Arithmetic and Logic Structures. |
| 650 24 - SUBJECT ADDED ENTRY--TOPICAL TERM |
|---|
| Topical Term |
Logic Design. |
| 700 1# - ADDED ENTRY--PERSONAL NAME |
|---|
| Personal name |
Joyce, Jeffrey J. |
| 700 1# - ADDED ENTRY--PERSONAL NAME |
|---|
| Personal name |
Seger, Carl-Johan H. |
| 856 40 - ELECTRONIC LOCATION AND ACCESS |
|---|
| Uniform Resource Identifier |
http://dx.doi.org/10.1007/3-540-57826-9 |
| 942 ## - ADDED ENTRY ELEMENTS (KOHA) |
|---|
| Koha item type |
E-BOOKS |
| 264 #1 - |
|---|
| -- |
Berlin, Heidelberg : |
| -- |
Springer Berlin Heidelberg, |
| -- |
1994. |
| 336 ## - |
|---|
| -- |
text |
| -- |
txt |
| -- |
rdacontent |
| 337 ## - |
|---|
| -- |
computer |
| -- |
c |
| -- |
rdamedia |
| 338 ## - |
|---|
| -- |
online resource |
| -- |
cr |
| -- |
rdacarrier |
| 347 ## - |
|---|
| -- |
text file |
| -- |
PDF |
| -- |
rda |
| 830 #0 - SERIES ADDED ENTRY--UNIFORM TITLE |
|---|
| -- |
0302-9743 ; |
