Field-Programmable Gate Arrays: Architecture and Tools for Rapid Prototyping (Record no. 35522)

000 -LEADER
fixed length control field 04386nam a22004935i 4500
020 ## - INTERNATIONAL STANDARD BOOK NUMBER
ISBN 9783540479024
-- 978-3-540-47902-4
082 04 - DEWEY DECIMAL CLASSIFICATION NUMBER
Classification number 621.395
245 10 - TITLE STATEMENT
Title Field-Programmable Gate Arrays: Architecture and Tools for Rapid Prototyping
Sub Title Second International Workshop on Field-Programmable Logic and Applications Vienna, Austria, August 31 – September 2, 1992 Selected Papers /
Statement of responsibility, etc edited by Herbert Grünbacher, Reiner W. Hartenstein.
260 #1 - PUBLICATION, DISTRIBUTION, ETC. (IMPRINT)
Place of publication Berlin, Heidelberg :
Name of publisher Springer Berlin Heidelberg,
Year of publication 1993.
300 ## - PHYSICAL DESCRIPTION
Number of Pages IX, 223 p.
Other physical details online resource.
490 1# - SERIES STATEMENT
Series statement Lecture Notes in Computer Science,
505 0# - FORMATTED CONTENTS NOTE
Formatted contents note Overview of complex array-based PLDs -- Technologies and utilization of Field Programmable Gate Arrays -- Some considerations on Field Programmable Gate Arrays and their impact on system design -- SRAM-based FPGAs ease system verification -- MONTAGE: An FPGA for synchronous and asynchronous circuits -- ORCA: A new architecture for high-performance FPGAs -- Patching method for lookup-table type FPGA's -- Automatic one-hot re-encoding for FPGAs -- Minimization of permuted Reed-Muller Trees for cellular logic programmable Gate arrays -- Self-organizing Kohonen maps for FPGA placement -- High level synthesis in an FPGA-based computer aided prototyping environment -- New application of FPGAs to programmable digital communication circuits -- FPGA based logic synthesis of squarers using VHDL -- Optimized fuzzy controller architecture for field programmable gate arrays -- A real-time kernel — Rapid prototyping with VHDL and FPGAs -- JAPROC — A 8 bit micro controller design and its test environment -- Chameleon: A workstation of a different colour -- A highly parallel FPGA-based machine and its formal verification -- FPGA based self-test with deterministic test patterns -- FPGA implementation of systolic sequence alignment -- Using FPGAs to prototype a self-timed computer -- Using FPGAs to implement a reconfigurable highly parallel computer -- Novel high performance machine paradigms and fast-turnaround ASIC design methods: A consequence of, and, a challenge to, field-programmable logic.
520 ## - SUMMARY, ETC.
Summary, etc This book contains papers first presented at the Second International Workshop on Field-Programmable Logic and Applications (FPL '92), held in Vienna, Austria, in August-September 1992. The growing importance of field-programmable devices, especially of field-programmable gate arrays, is demonstrated by the increased number of papers submitted in 1992. Of the 70 papers submitted, 23 were selected for this book. The first three papers were invited and discuss strategic issues and give surveys. Three papers deal with new FPGA architectures and five papers introduce methods and tools. The last twelve papers report applications focusing on rapid prototyping or new FPGA-based computer architectures. The invited papersare: "Overview of complex array-based PLDs" by G. Biehl; "Technologies and utilization of field programmable gate arrays" by J. Isoaho, A. Nummela, andH. Tenhunen; and "Some considerations on field-programmable gate arrays and their impact on system design" by A. Sangiovanni-Vincentelli.
650 #0 - SUBJECT ADDED ENTRY--TOPICAL TERM
Topical Term Computer science.
650 #0 - SUBJECT ADDED ENTRY--TOPICAL TERM
Topical Term Logic design.
650 #0 - SUBJECT ADDED ENTRY--TOPICAL TERM
Topical Term Electronics.
650 14 - SUBJECT ADDED ENTRY--TOPICAL TERM
Topical Term Computer Science.
650 24 - SUBJECT ADDED ENTRY--TOPICAL TERM
Topical Term Logic Design.
650 24 - SUBJECT ADDED ENTRY--TOPICAL TERM
Topical Term Electronics and Microelectronics, Instrumentation.
700 1# - ADDED ENTRY--PERSONAL NAME
Personal name Grünbacher, Herbert.
700 1# - ADDED ENTRY--PERSONAL NAME
Personal name Hartenstein, Reiner W.
856 40 - ELECTRONIC LOCATION AND ACCESS
Uniform Resource Identifier http://dx.doi.org/10.1007/3-540-57091-8
942 ## - ADDED ENTRY ELEMENTS (KOHA)
Koha item type E-BOOKS
264 #1 -
-- Berlin, Heidelberg :
-- Springer Berlin Heidelberg,
-- 1993.
336 ## -
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337 ## -
-- computer
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-- rdamedia
338 ## -
-- online resource
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347 ## -
-- text file
-- PDF
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830 #0 - SERIES ADDED ENTRY--UNIFORM TITLE
-- 0302-9743 ;
Holdings
Withdrawn status Lost status Damaged status Not for loan Current library Accession Number Uniform Resource Identifier Koha item type
        IMSc Library EBK6228 http://dx.doi.org/10.1007/3-540-57091-8 E-BOOKS
The Institute of Mathematical Sciences, Chennai, India

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