PARLE Parallel Architectures and Languages Europe (Record no. 35283)

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fixed length control field 03673nam a22004695i 4500
020 ## - INTERNATIONAL STANDARD BOOK NUMBER
ISBN 9783540471448
-- 978-3-540-47144-8
082 04 - DEWEY DECIMAL CLASSIFICATION NUMBER
Classification number 004.1
245 10 - TITLE STATEMENT
Title PARLE Parallel Architectures and Languages Europe
Sub Title Volume I: Parallel Architectures Eindhoven, The Netherlands, June 15–19, 1987 Proceedings /
Statement of responsibility, etc edited by J. W. Bakker, A. J. Nijman, P. C. Treleaven.
260 #1 - PUBLICATION, DISTRIBUTION, ETC. (IMPRINT)
Place of publication Berlin, Heidelberg :
Name of publisher Springer Berlin Heidelberg,
Year of publication 1987.
300 ## - PHYSICAL DESCRIPTION
Number of Pages XIV, 490 p.
Other physical details online resource.
490 1# - SERIES STATEMENT
Series statement Lecture Notes in Computer Science,
505 0# - FORMATTED CONTENTS NOTE
Formatted contents note Learning translation invariant recognition in a massively parallel networks -- Trace theory and systolic computations -- Boltzmann machines and their applications -- Cobweb-2: Structured specification of a wafer-scale supercomputer -- A novel deadlock free and starvation free packet switching communication processor -- A parallel architecture for signal understanding through inference on uncertain data -- An axiomatic approach to the specification of distributed computer architectures -- Computing on a systolic screen: Hulls, contours and applications -- Multiprocessor systems programming in a high-level data-flow language -- The twisted cube -- An implemented method for incremental systolic design -- The use of parallel functions in system design -- The translation of processes into circuits -- Mapping strategies in message based multiprocessor systems -- Hardware memory management for large knowledge bases -- Transputer-based experiments with the ZAPP architecture -- Synthesis of systolic arrays for inductive problems -- Practical parallelism using transputer arrays -- Systolic array synthesis by static analysis of program dependencies -- Specification of a pipelined event driven simulator using FP2 -- A layered emulator for design evaluation of MIMD multiprocessors with shared memory -- The Alliant FX/Series: A language driven architecture for parallel processing of dusty deck fortran -- Emulating digital logic using transputer networks (very high parallelism = simplicity = performance) -- A two-level approach to logic plus functional programming integration -- Overview of a parallel reduction machine project -- An overview of DDC: Delta driven computer -- Design and implementation of a parallel inference machine for first order logic: an overview -- Multi-level simulator for VLSI -- The DOOM system and its applications: A survey of esprit 415 subproject A, philips research laboratories.
650 #0 - SUBJECT ADDED ENTRY--TOPICAL TERM
Topical Term Computer science.
650 14 - SUBJECT ADDED ENTRY--TOPICAL TERM
Topical Term Computer Science.
650 24 - SUBJECT ADDED ENTRY--TOPICAL TERM
Topical Term Processor Architectures.
650 24 - SUBJECT ADDED ENTRY--TOPICAL TERM
Topical Term Programming Languages, Compilers, Interpreters.
700 1# - ADDED ENTRY--PERSONAL NAME
Personal name Bakker, J. W.
700 1# - ADDED ENTRY--PERSONAL NAME
Personal name Nijman, A. J.
700 1# - ADDED ENTRY--PERSONAL NAME
Personal name Treleaven, P. C.
856 40 - ELECTRONIC LOCATION AND ACCESS
Uniform Resource Identifier http://dx.doi.org/10.1007/3-540-17943-7
942 ## - ADDED ENTRY ELEMENTS (KOHA)
Koha item type E-BOOKS
264 #1 -
-- Berlin, Heidelberg :
-- Springer Berlin Heidelberg,
-- 1987.
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-- online resource
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830 #0 - SERIES ADDED ENTRY--UNIFORM TITLE
-- 0302-9743 ;
Holdings
Withdrawn status Lost status Damaged status Not for loan Current library Accession Number Uniform Resource Identifier Koha item type
        IMSc Library EBK5989 http://dx.doi.org/10.1007/3-540-17943-7 E-BOOKS
The Institute of Mathematical Sciences, Chennai, India

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