CONPAR 86 (Record no. 34341)

000 -LEADER
fixed length control field 05103nam a22004935i 4500
020 ## - INTERNATIONAL STANDARD BOOK NUMBER
ISBN 9783540448563
-- 978-3-540-44856-3
082 04 - DEWEY DECIMAL CLASSIFICATION NUMBER
Classification number 004.1
245 10 - TITLE STATEMENT
Title CONPAR 86
Sub Title Conference on Algorithms and Hardware for Parallel Processing Aachen, September 17–19, 1986 Proceedings /
Statement of responsibility, etc edited by Wolfgang Händler, Dieter Haupt, Rolf Jeltsch, Wilfried Juling, Otto Lange.
260 #1 - PUBLICATION, DISTRIBUTION, ETC. (IMPRINT)
Place of publication Berlin, Heidelberg :
Name of publisher Springer Berlin Heidelberg,
Year of publication 1986.
300 ## - PHYSICAL DESCRIPTION
Number of Pages XII, 424 p.
Other physical details online resource.
490 1# - SERIES STATEMENT
Series statement Lecture Notes in Computer Science,
505 0# - FORMATTED CONTENTS NOTE
Formatted contents note A radically non-von-Neumann-architecture for learning and discovery -- The parallel solution of sparse linear equations -- Parallel algorithms on the cedar system -- Future parallel computers -- SUPRENUM — an MIMD multiprocessor system for multi-level scientific computing -- An adaptable cluster structure of (sm)2 -II -- Memory conflicts in MIMD-computers — a performance analysis -- The digital optical computing program at Erlangen -- Hmesh: A vlsi architecture for parallel processing -- FFT on a new parallel vector processor -- Analysis of multigrid methods for non-shared memory systems by a simple performance model -- Multitasking algorithms on CRAY computers for interval arithmetic Newton-like methods for a class of systems of nonlinear equations -- Full recursive form of the algorithms for fast generalized fourier transforms -- SISAL: Initial MIMD performance results -- Caltech hypercube MIMD computer performances measurements in a physical mathematical application -- A new approach to decentralized control of job scheduling -- Synchronous communication of cooperating processes in the M5PS multiprocessor -- Parallel implementation of the algebraic path problem -- Implementing branch-and-bound in a ring of processors -- Synthesis of systolic algorithms and processor arrays -- Fraktale und ihre Untersuchung mit Parallelrechnung -- A parallel processing algorithm for thinning digitised pictures -- Fault-tolerant hardware configuration management on the multiprocessor system DIRMU 25 -- A general purpose pipelined ring architecture -- An adaptive parallel algorithm for display of CSG objects -- A packet based demand/data driven reduction model for the parallel execution of logic programs -- Information processing with associative processors -- A high performance interconnection concept for dataflow- or other closely coupled multiprocessors -- Parallel solution of eigenvalue problems in acoustics on the Distributed Array Processor (DAP) -- Gauss elimination algorithms for mimd computers -- Fast parallel algorithms for eigenvalue and singular value computations -- A new Parallel algorithm for solving general linear systems of equations -- Generalized asynchronous iterations -- Parallel compilation on a multiprocessor system -- Semi-automatic parallelization of fortran programs -- Code generation for partially vectorizable loops in the vectorizing Pascal-XT compiler -- Automatic vectorisation for high level languages based on an expert system -- Hierarchical array processor system (HAP) -- Ocsamo a systolic array for matrix operations -- A general approach to sorting on 3-dimensionally mesh-connected arrays -- Complexity of parallel partitioned algorithms -- Shuffle/exchange is the natural interconnection scheme for the parallel fast fourier transform -- Kronecker products of matrices and their implementation on shuffle/exchange-type processor networks -- Lisa: A parallel processing architecture -- A classification of algorithms which are well suited for implementations on the DAP as a basis for further research on parallel programming -- Use of inherent parallelism in database operations -- Parallel dynamic programming algorithms -- Multiprocessors: Main trends and dead ends -- Toward the parallel inference machine.
650 #0 - SUBJECT ADDED ENTRY--TOPICAL TERM
Topical Term Computer science.
650 14 - SUBJECT ADDED ENTRY--TOPICAL TERM
Topical Term Computer Science.
650 24 - SUBJECT ADDED ENTRY--TOPICAL TERM
Topical Term Processor Architectures.
650 24 - SUBJECT ADDED ENTRY--TOPICAL TERM
Topical Term Arithmetic and Logic Structures.
700 1# - ADDED ENTRY--PERSONAL NAME
Personal name Händler, Wolfgang.
700 1# - ADDED ENTRY--PERSONAL NAME
Personal name Haupt, Dieter.
700 1# - ADDED ENTRY--PERSONAL NAME
Personal name Jeltsch, Rolf.
700 1# - ADDED ENTRY--PERSONAL NAME
Personal name Juling, Wilfried.
700 1# - ADDED ENTRY--PERSONAL NAME
Personal name Lange, Otto.
856 40 - ELECTRONIC LOCATION AND ACCESS
Uniform Resource Identifier http://dx.doi.org/10.1007/3-540-16811-7
942 ## - ADDED ENTRY ELEMENTS (KOHA)
Koha item type E-BOOKS
264 #1 -
-- Berlin, Heidelberg :
-- Springer Berlin Heidelberg,
-- 1986.
336 ## -
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-- computer
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-- rdamedia
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-- online resource
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-- text file
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830 #0 - SERIES ADDED ENTRY--UNIFORM TITLE
-- 0302-9743 ;
Holdings
Withdrawn status Lost status Damaged status Not for loan Current library Accession Number Uniform Resource Identifier Koha item type
        IMSc Library EBK5047 http://dx.doi.org/10.1007/3-540-16811-7 E-BOOKS
The Institute of Mathematical Sciences, Chennai, India

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