| 000 -LEADER |
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| fixed length control field |
05917nam a22006135i 4500 |
| 020 ## - INTERNATIONAL STANDARD BOOK NUMBER |
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| ISBN |
9783540383949 |
| -- |
978-3-540-38394-9 |
| 082 04 - DEWEY DECIMAL CLASSIFICATION NUMBER |
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| Classification number |
005.1015113 |
| 245 10 - TITLE STATEMENT |
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| Title |
Computer-Aided Verification |
| Sub Title |
2nd International Conference, CAV '90 New Brunswick, NJ, USA, June 18–21, 1990 Proceedings / |
| Statement of responsibility, etc |
edited by Edmund M. Clarke, Robert P. Kurshan. |
| 260 #1 - PUBLICATION, DISTRIBUTION, ETC. (IMPRINT) |
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| Place of publication |
Berlin, Heidelberg : |
| Name of publisher |
Springer Berlin Heidelberg, |
| Year of publication |
1991. |
| 300 ## - PHYSICAL DESCRIPTION |
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| Number of Pages |
XIV, 378 p. |
| Other physical details |
online resource. |
| 490 1# - SERIES STATEMENT |
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| Series statement |
Lecture Notes in Computer Science, |
| 505 0# - FORMATTED CONTENTS NOTE |
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| Formatted contents note |
Temporal logic model checking: Two techniques for avoiding the state explosion problem -- Automatic verification of extensions of hardware descriptions -- Papetri : Environment for the analysis of PETRI nets -- Verifying temporal properties of sequential machines without building their state diagrams -- Formal verification of digital circuits using symbolic ternary system models -- Vectorized model checking for computation tree logic -- to a computational theory and implementation of sequential hardware equivalence -- Auto/autograph -- A data path verifier for register transfer level using temporal logic language Tokio -- The use of model checking in ATPG for sequential circuits -- Compositional design and verification of communication protocols, using labelled petri nets -- Issues arising in the analysis of L.0 -- Automated RTL verification based on predicate calculus -- On using protean to verify ISO FTAM protocol -- Quantitative temporal reasoning -- Using partial-order semantics to avoid the state explosion problem in asynchronous systems -- A stubborn attack on state explosion -- Using optimal simulations to reduce reachability graphs -- Using partial orders to improve automatic verification methods -- Compositional minimization of finite state systems -- Minimal model generation -- A context dependent equivalence relation between kripke structures -- The modular framework of computer-aided verification -- Verifying liveness properties by verifying safety properties -- Memory efficient algorithms for the verification of temporal properties -- A unified approach to the deadlock detection problem in networks of communicating finite state machines -- Branching time regular temporal logic for model checking with linear time complexity -- The algebraic feedback product of automata -- Synthesizing processes and schedulers from temporal specifications -- Task-driven supervisory control of discrete event systems -- A proof lattice-based technique for analyzing liveness of resource controllers -- Verification of a multiprocessor cache protocol using simulation relations and higher-order logic (summary) -- Computer assistance for program refinement -- Program verification by symbolic execution of hyperfinite ideal machines -- Extension of the Karp and miller procedure to lotos specifications -- An algebra for delay-insensitive circuits -- Finiteness conditions and structural construction of automata for all process algebras -- On automatically explaining bisimulation inequivalence. |
| 520 ## - SUMMARY, ETC. |
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| Summary, etc |
This volume contains the proceedings of the second workshop on Computer Aided Verification, held at DIMACS, Rutgers University, June 18-21, 1990. Itfeatures theoretical results that lead to new or more powerful verification methods. Among these are advances in the use of binary decision diagrams, dense time, reductions based upon partial order representations and proof-checking in controller verification. The motivation for holding a workshop on computer aided verification was to bring together work on effective algorithms or methodologies for formal verification - as distinguished, say,from attributes of logics or formal languages. The considerable interest generated by the first workshop, held in Grenoble, June 1989 (see LNCS 407), prompted this second meeting. The general focus of this volume is on the problem of making formal verification feasible for various models of computation. Specific emphasis is on models associated with distributed programs, protocols, and digital circuits. The general test of algorithm feasibility is to embed it into a verification tool, and exercise that tool on realistic examples: the workshop included sessionsfor the demonstration of new verification tools. |
| 650 #0 - SUBJECT ADDED ENTRY--TOPICAL TERM |
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| Topical Term |
Computer science. |
| 650 #0 - SUBJECT ADDED ENTRY--TOPICAL TERM |
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| Topical Term |
Computer Communication Networks. |
| 650 #0 - SUBJECT ADDED ENTRY--TOPICAL TERM |
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| Topical Term |
Software engineering. |
| 650 #0 - SUBJECT ADDED ENTRY--TOPICAL TERM |
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| Topical Term |
Logic design. |
| 650 #0 - SUBJECT ADDED ENTRY--TOPICAL TERM |
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| Topical Term |
Logic, Symbolic and mathematical. |
| 650 14 - SUBJECT ADDED ENTRY--TOPICAL TERM |
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| Topical Term |
Computer Science. |
| 650 24 - SUBJECT ADDED ENTRY--TOPICAL TERM |
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| Topical Term |
Logics and Meanings of Programs. |
| 650 24 - SUBJECT ADDED ENTRY--TOPICAL TERM |
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| Topical Term |
Mathematical Logic and Formal Languages. |
| 650 24 - SUBJECT ADDED ENTRY--TOPICAL TERM |
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| Topical Term |
Software Engineering. |
| 650 24 - SUBJECT ADDED ENTRY--TOPICAL TERM |
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| Topical Term |
Special Purpose and Application-Based Systems. |
| 650 24 - SUBJECT ADDED ENTRY--TOPICAL TERM |
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| Topical Term |
Computer Communication Networks. |
| 650 24 - SUBJECT ADDED ENTRY--TOPICAL TERM |
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| Topical Term |
Mathematical Logic and Foundations. |
| 700 1# - ADDED ENTRY--PERSONAL NAME |
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| Personal name |
Clarke, Edmund M. |
| 700 1# - ADDED ENTRY--PERSONAL NAME |
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| Personal name |
Kurshan, Robert P. |
| 856 40 - ELECTRONIC LOCATION AND ACCESS |
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| Uniform Resource Identifier |
http://dx.doi.org/10.1007/BFb0023712 |
| 942 ## - ADDED ENTRY ELEMENTS (KOHA) |
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| Koha item type |
E-BOOKS |
| 264 #1 - |
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Berlin, Heidelberg : |
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Springer Berlin Heidelberg, |
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1991. |
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text |
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rdacontent |
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computer |
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rdamedia |
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online resource |
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rdacarrier |
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text file |
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PDF |
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rda |
| 830 #0 - SERIES ADDED ENTRY--UNIFORM TITLE |
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0302-9743 ; |
