000			04404nam a22005775i 4500
001			978-3-642-15031-9
003			DE-He213
005			20160624102146.0
007			cr nn 008mamaa
008			100808s2010 gw | s |||| 0|eng d
020			_a9783642150319 _9978-3-642-15031-9
024	7		_a10.1007/978-3-642-15031-9 _2doi
050		4	_aQA76.9.A25
072		7	_aURY _2bicssc
072		7	_aCOM053000 _2bisacsh
082	0	4	_a005.82 _223
245	1	0	_aCryptographic Hardware and Embedded Systems, CHES 2010 _h[electronic resource] : _b12th International Workshop, Santa Barbara, USA, August 17-20, 2010. Proceedings / _cedited by Stefan Mangard, François-Xavier Standaert.
260		1	_aBerlin, Heidelberg : _bSpringer Berlin Heidelberg, _c2010.
264		1	_aBerlin, Heidelberg : _bSpringer Berlin Heidelberg, _c2010.
300			_aXIII, 458p. 142 illus. _bonline resource.
336			_atext _btxt _2rdacontent
337			_acomputer _bc _2rdamedia
338			_aonline resource _bcr _2rdacarrier
347			_atext file _bPDF _2rda
490	1		_aLecture Notes in Computer Science, _x0302-9743 ; _v6225
505	0		_aLow Cost Cryptography -- Quark: A Lightweight Hash -- PRINTcipher: A Block Cipher for IC-Printing -- Sponge-Based Pseudo-Random Number Generators -- Efficient Implementations I -- A High Speed Coprocessor for Elliptic Curve Scalar Multiplications over -- Co-Z Addition Formulæ and Binary Ladders on Elliptic Curves -- Efficient Techniques for High-Speed Elliptic Curve Cryptography -- Side-Channel Attacks and Countermeasures I -- Analysis and Improvement of the Random Delay Countermeasure of CHES 2009 -- New Results on Instruction Cache Attacks -- Correlation-Enhanced Power Analysis Collision Attack -- Side-Channel Analysis of Six SHA-3 Candidates -- Tamper Resistance and Hardware Trojans -- Flash Memory ‘Bumping’ Attacks -- Self-referencing: A Scalable Side-Channel Approach for Hardware Trojan Detection -- When Failure Analysis Meets Side-Channel Attacks -- Efficient Implementations II -- Fast Exhaustive Search for Polynomial Systems in -- 256 Bit Standardized Crypto for 650 GE – GOST Revisited -- Mixed Bases for Efficient Inversion in and Conversion Matrices of SubBytes of AES -- SHA-3 -- Developing a Hardware Evaluation Method for SHA-3 Candidates -- Fair and Comprehensive Methodology for Comparing Hardware Performance of Fourteen Round Two SHA-3 Candidates Using FPGAs -- Performance Analysis of the SHA-3 Candidates on Exotic Multi-core Architectures -- XBX: eXternal Benchmarking eXtension for the SUPERCOP Crypto Benchmarking Framework -- Fault Attacks and Countermeasures -- Public Key Perturbation of Randomized RSA Implementations -- Fault Sensitivity Analysis -- PUFs and RNGs -- An Alternative to Error Correction for SRAM-Like PUFs -- New High Entropy Element for FPGA Based True Random Number Generators -- The Glitch PUF: A New Delay-PUF Architecture Exploiting Glitch Shapes -- New Designs -- Garbled Circuits for Leakage-Resilience: Hardware Implementation and Evaluation of One-Time Programs -- ARMADILLO: A Multi-purpose Cryptographic Primitive Dedicated to Hardware -- Side-Channel Attacks and Countermeasures II -- Provably Secure Higher-Order Masking of AES -- Algebraic Side-Channel Analysis in the Presence of Errors -- Coordinate Blinding over Large Prime Fields.
650		0	_aComputer science.
650		0	_aData protection.
650		0	_aData structures (Computer science).
650		0	_aData encryption (Computer science).
650		0	_aCoding theory.
650		0	_aComputer software.
650		0	_aComputational complexity.
650	1	4	_aComputer Science.
650	2	4	_aData Encryption.
650	2	4	_aCoding and Information Theory.
650	2	4	_aData Structures, Cryptology and Information Theory.
650	2	4	_aSystems and Data Security.
650	2	4	_aAlgorithm Analysis and Problem Complexity.
650	2	4	_aDiscrete Mathematics in Computer Science.
700	1		_aMangard, Stefan. _eeditor.
700	1		_aStandaert, François-Xavier. _eeditor.
710	2		_aSpringerLink (Online service)
773	0		_tSpringer eBooks
776	0	8	_iPrinted edition: _z9783642150302
786			_dSpringer
830		0	_aLecture Notes in Computer Science, _x0302-9743 ; _v6225
856	4	0	_uhttp://dx.doi.org/10.1007/978-3-642-15031-9
942			_2EBK9212 _cEBK
999			_c38506 _d38506