000 | 05994nam a22006135i 4500 | ||
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001 | 978-3-642-13374-9 | ||
003 | DE-He213 | ||
005 | 20160624102143.0 | ||
007 | cr nn 008mamaa | ||
008 | 100610s2010 gw | s |||| 0|eng d | ||
020 |
_a9783642133749 _9978-3-642-13374-9 |
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024 | 7 |
_a10.1007/978-3-642-13374-9 _2doi |
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050 | 4 | _aQA76.7-76.73 | |
050 | 4 | _aQA76.76.C65 | |
072 | 7 |
_aUMX _2bicssc |
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_aUMC _2bicssc |
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072 | 7 |
_aCOM051010 _2bisacsh |
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_aCOM010000 _2bisacsh |
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082 | 0 | 4 |
_a005.13 _223 |
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_aLanguages and Compilers for Parallel Computing _h[electronic resource] : _b22nd International Workshop, LCPC 2009, Newark, DE, USA, October 8-10, 2009, Revised Selected Papers / _cedited by Guang R. Gao, Lori L. Pollock, John Cavazos, Xiaoming Li. |
260 | 1 |
_aBerlin, Heidelberg : _bSpringer Berlin Heidelberg, _c2010. |
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264 | 1 |
_aBerlin, Heidelberg : _bSpringer Berlin Heidelberg, _c2010. |
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300 |
_aXI, 426p. _bonline resource. |
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_atext _btxt _2rdacontent |
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_acomputer _bc _2rdamedia |
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_aonline resource _bcr _2rdacarrier |
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_atext file _bPDF _2rda |
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490 | 1 |
_aLecture Notes in Computer Science, _x0302-9743 ; _v5898 |
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505 | 0 | _aA Communication Framework for Fault-Tolerant Parallel Execution -- The STAPL pList -- Hardware Support for OpenMP Collective Operations -- Loop Transformation Recipes for Code Generation and Auto-Tuning -- MIMD Interpretation on a GPU -- TL-DAE: Thread-Level Decoupled Access/Execution for OpenMP on the Cyclops-64 Many-Core Processor -- Mapping Streaming Languages to General Purpose Processors through Vectorization -- A Balanced Approach to Application Performance Tuning -- Automatically Tuning Parallel and Parallelized Programs -- DFT Performance Prediction in FFTW -- Safe and Familiar Multi-core Programming by Means of a Hybrid Functional and Imperative Language -- Hierarchical Place Trees: A Portable Abstraction for Task Parallelism and Data Movement -- OSCAR API for Real-Time Low-Power Multicores and Its Performance on Multicores and SMP Servers -- Programming with Intervals -- Adaptive and Speculative Memory Consistency Support for Multi-core Architectures with On-Chip Local Memories -- Synchronization-Free Automatic Parallelization: Beyond Affine Iteration-Space Slicing -- Automatic Data Distribution for Improving Data Locality on the Cell BE Architecture -- Automatic Restructuring of Linked Data Structures -- Using the Meeting Graph Framework to Minimise Kernel Loop Unrolling for Scheduled Loops -- Efficient Tiled Loop Generation: D-Tiling -- Effective Source-to-Source Outlining to Support Whole Program Empirical Optimization -- Speculative Optimizations for Parallel Programs on Multicores -- Fastpath Speculative Parallelization -- PSnAP: Accurate Synthetic Address Streams through Memory Profiles -- Enforcing Textual Alignment of Collectives Using Dynamic Checks -- A Code Generation Approach for Auto-Vectorization in the Spade Compiler -- Portable Just-in-Time Specialization of Dynamically Typed Scripting Languages -- Reducing Training Time in a One-Shot Machine Learning-Based Compiler -- Optimizing Local Memory Allocation and Assignment through a Decoupled Approach -- Unrolling Loops Containing Task Parallelism. | |
520 | _aItisourpleasuretopresentthepapersacceptedforthe22ndInternationalWo- shop on Languages and Compilers for Parallel Computing held during October 8–10 2009 in Newark Delaware, USA. Since 1986, LCPC has became a valuable venueforresearchersto reportonworkinthegeneralareaofparallelcomputing, high-performance computer architecture and compilers. LCPC 2009 continued this tradition and in particular extended the area of interest to new parallel computing accelerators such as the IBM Cell Processor and Graphic Processing Unit (GPU). This year we received 52 submissions from 15 countries. Each submission receivedatleastthreereviewsandmosthadfour.ThePCalsosoughtadditional externalreviewsforcontentiouspapers.ThePCheldanall-dayphoneconference on August 24 to discuss the papers. PC members who had a con?ict of interest were asked to leave the call temporarily when the corresponding papers were discussed. From the 52 submissions, the PC selected 25 full papers and 5 short paperstobeincludedintheworkshopproceeding,representinga58%acceptance rate. We were fortunate to have three keynote speeches, a panel discussion and a tutorial in this year’s workshop. First, Thomas Sterling, Professor of Computer Science at Louisiana State University, gave a keynote talk titled “HPC in Phase Change: Towards a New Parallel Execution Model.” Sterling argued that a new multi-dimensional research thrust was required to realize the design goals with regard to power, complexity, clock rate and reliability in the new parallel c- puter systems.ParalleX,anexploratoryexecutionmodeldevelopedbySterling’s group was introduced to guide the co-design of new architectures, programming methods and system software. | ||
650 | 0 | _aComputer science. | |
650 | 0 | _aComputer Communication Networks. | |
650 | 0 | _aData structures (Computer science). | |
650 | 0 | _aElectronic data processing. | |
650 | 1 | 4 | _aComputer Science. |
650 | 2 | 4 | _aProgramming Languages, Compilers, Interpreters. |
650 | 2 | 4 | _aProgramming Techniques. |
650 | 2 | 4 | _aData Structures. |
650 | 2 | 4 | _aComputing Methodologies. |
650 | 2 | 4 | _aModels and Principles. |
650 | 2 | 4 | _aComputer Communication Networks. |
700 | 1 |
_aGao, Guang R. _eeditor. |
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700 | 1 |
_aPollock, Lori L. _eeditor. |
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700 | 1 |
_aCavazos, John. _eeditor. |
|
700 | 1 |
_aLi, Xiaoming. _eeditor. |
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710 | 2 | _aSpringerLink (Online service) | |
773 | 0 | _tSpringer eBooks | |
776 | 0 | 8 |
_iPrinted edition: _z9783642133732 |
786 | _dSpringer | ||
830 | 0 |
_aLecture Notes in Computer Science, _x0302-9743 ; _v5898 |
|
856 | 4 | 0 | _uhttp://dx.doi.org/10.1007/978-3-642-13374-9 |
942 |
_2EBK9057 _cEBK |
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_c38351 _d38351 |