000 04179nam a22005175i 4500
001 978-3-540-47963-5
003 DE-He213
005 20160624102028.0
007 cr nn 008mamaa
008 121227s1987 gw | s |||| 0|eng d
020 _a9783540479635
_9978-3-540-47963-5
024 7 _a10.1007/3-540-18420-1
_2doi
050 4 _aQA75.5-76.95
072 7 _aUYZG
_2bicssc
072 7 _aCOM037000
_2bisacsh
082 0 4 _a004.0151
_223
245 1 0 _aGraph Reduction
_h[electronic resource] :
_bProceedings of a Workshop Santa Fé, New Mexico, USA September 29–October 1, 1986 /
_cedited by Joseph H. Fasel, Robert M. Keller.
260 1 _aBerlin, Heidelberg :
_bSpringer Berlin Heidelberg,
_c1987.
264 1 _aBerlin, Heidelberg :
_bSpringer Berlin Heidelberg,
_c1987.
300 _aXVI, 450 p.
_bonline resource.
336 _atext
_btxt
_2rdacontent
337 _acomputer
_bc
_2rdamedia
338 _aonline resource
_bcr
_2rdacarrier
347 _atext file
_bPDF
_2rda
490 1 _aLecture Notes in Computer Science,
_x0302-9743 ;
_v279
505 0 _aOn the correspondence of lambda style reduction and combinator style reduction -- Head order reduction: A graph reduction scheme for the operational lambda calculus -- A simple abstract machine to execute supercombinators -- Concurrent term rewriting as a model of computation -- Alfalfa: Distributed graph reduction on a hypercube multiprocessor -- Parallel graph reduction on a supercomputer: A status report -- Target code generation from G-machine code -- Toward the design of a parallel graph reduction machine the MaRS project -- The parallel graph reduction machine, ALICE -- Overview of Rediflow II development -- Specification of reduction strategies in term rewriting systems -- Controlling reduction partial order in functional parallel programs -- Parallel garbage collection for graph machines -- Graph reduction in a parallel virtual memory environment -- Performance measurement of a G-machine implementation -- A flexible architectural study methodology -- Arrays, non-determinism, side-effects, and parallelism: A functional perspective -- A new array operation -- I-Structures: Data structures for parallel computing -- Parallel execution of an equational language -- Implementing logical variables on a graph reduction architecture -- Functional logic languages part I -- Unification of quantified terms.
520 _aThis volume describes recent research in graph reduction and related areas of functional and logic programming, as reported at a workshop in 1986. The papers are based on the presentations, and because the final versions were prepared after the workshop, they reflect some of the discussions as well. Some benefits of graph reduction can be found in these papers: - A mathematically elegant denotational semantics - Lazy evaluation, which avoids recomputation and makes programming with infinite data structures (such as streams) possible - A natural tasking model for fine-to-medium grain parallelism. The major topics covered are computational models for graph reduction, implementation of graph reduction on conventional architectures, specialized graph reduction architectures, resource control issues such as control of reduction order and garbage collection, performance modelling and simulation, treatment of arrays, and the relationship of graph reduction to logic programming.
650 0 _aComputer science.
650 0 _aLogic, Symbolic and mathematical.
650 1 4 _aComputer Science.
650 2 4 _aComputation by Abstract Devices.
650 2 4 _aMathematical Logic and Formal Languages.
650 2 4 _aProcessor Architectures.
650 2 4 _aProgramming Techniques.
650 2 4 _aMathematical Logic and Foundations.
700 1 _aFasel, Joseph H.
_eeditor.
700 1 _aKeller, Robert M.
_eeditor.
710 2 _aSpringerLink (Online service)
773 0 _tSpringer eBooks
776 0 8 _iPrinted edition:
_z9783540184201
786 _dSpringer
830 0 _aLecture Notes in Computer Science,
_x0302-9743 ;
_v279
856 4 0 _uhttp://dx.doi.org/10.1007/3-540-18420-1
942 _2EBK6251
_cEBK
999 _c35545
_d35545