TY  - BOOK
AU  - Händler,Wolfgang
AU  - Haupt,Dieter
AU  - Jeltsch,Rolf
AU  - Juling,Wilfried
AU  - Lange,Otto
ED  - SpringerLink (Online service)
TI  - CONPAR 86: Conference on Algorithms and Hardware for Parallel Processing Aachen, September 17–19, 1986 Proceedings 
T2  - Lecture Notes in Computer Science,
SN  - 9783540448563
AV  - TK7895.M5 
U1  - 004.1 23
PY  - 1986///
CY  - Berlin, Heidelberg
PB  - Springer Berlin Heidelberg
KW  - Computer science
KW  - Computer Science
KW  - Processor Architectures
KW  - Arithmetic and Logic Structures
N1  - A radically non-von-Neumann-architecture for learning and discovery -- The parallel solution of sparse linear equations -- Parallel algorithms on the cedar system -- Future parallel computers -- SUPRENUM — an MIMD multiprocessor system for multi-level scientific computing -- An adaptable cluster structure of (sm)2 -II -- Memory conflicts in MIMD-computers — a performance analysis -- The digital optical computing program at Erlangen -- Hmesh: A vlsi architecture for parallel processing -- FFT on a new parallel vector processor -- Analysis of multigrid methods for non-shared memory systems by a simple performance model -- Multitasking algorithms on CRAY computers for interval arithmetic Newton-like methods for a class of systems of nonlinear equations -- Full recursive form of the algorithms for fast generalized fourier transforms -- SISAL: Initial MIMD performance results -- Caltech hypercube MIMD computer performances measurements in a physical mathematical application -- A new approach to decentralized control of job scheduling -- Synchronous communication of cooperating processes in the M5PS multiprocessor -- Parallel implementation of the algebraic path problem -- Implementing branch-and-bound in a ring of processors -- Synthesis of systolic algorithms and processor arrays -- Fraktale und ihre Untersuchung mit Parallelrechnung -- A parallel processing algorithm for thinning digitised pictures -- Fault-tolerant hardware configuration management on the multiprocessor system DIRMU 25 -- A general purpose pipelined ring architecture -- An adaptive parallel algorithm for display of CSG objects -- A packet based demand/data driven reduction model for the parallel execution of logic programs -- Information processing with associative processors -- A high performance interconnection concept for dataflow- or other closely coupled multiprocessors -- Parallel solution of eigenvalue problems in acoustics on the Distributed Array Processor (DAP) -- Gauss elimination algorithms for mimd computers -- Fast parallel algorithms for eigenvalue and singular value computations -- A new Parallel algorithm for solving general linear systems of equations -- Generalized asynchronous iterations -- Parallel compilation on a multiprocessor system -- Semi-automatic parallelization of fortran programs -- Code generation for partially vectorizable loops in the vectorizing Pascal-XT compiler -- Automatic vectorisation for high level languages based on an expert system -- Hierarchical array processor system (HAP) -- Ocsamo a systolic array for matrix operations -- A general approach to sorting on 3-dimensionally mesh-connected arrays -- Complexity of parallel partitioned algorithms -- Shuffle/exchange is the natural interconnection scheme for the parallel fast fourier transform -- Kronecker products of matrices and their implementation on shuffle/exchange-type processor networks -- Lisa: A parallel processing architecture -- A classification of algorithms which are well suited for implementations on the DAP as a basis for further research on parallel programming -- Use of inherent parallelism in database operations -- Parallel dynamic programming algorithms -- Multiprocessors: Main trends and dead ends -- Toward the parallel inference machine
UR  - http://dx.doi.org/10.1007/3-540-16811-7
ER  -